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diff -Nur u-boot-2015.01.orig/board/udoo/1066mhz_4x256mx16_dl.cfg u-boot-2015.01/board/udoo/1066mhz_4x256mx16_dl.cfg
--- u-boot-2015.01.orig/board/udoo/1066mhz_4x256mx16_dl.cfg 1969-12-31 21:00:00.000000000 -0300
+++ u-boot-2015.01/board/udoo/1066mhz_4x256mx16_dl.cfg 2016-02-24 01:42:53.330380669 -0300
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2013 Seco USA Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+
+DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D
+DATA 4, MX6_MMDC_P0_MDOTC, 0x00333040
+
+DATA 4, MX6_MMDC_P0_MDCFG0, 0x3F4352F3
+DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66D8B63
+DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
+
+DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
+DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
+DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2
+
+
+DATA 4, MX6_MMDC_P0_MDOR, 0x00431023
+DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
+DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000
+
+DATA 4, MX6_MMDC_P0_MDSCR, 0x02008032
+DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
+DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
+DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030
+DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
+
+DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
+DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xa1390003
+
+DATA 4, MX6_MMDC_P0_MDREF, 0x00007800
+
+DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227
+DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227
+
+DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x425C0251
+DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x021B021E
+DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x021B021E
+DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x01730200
+
+DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45474C45
+DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x44464744
+DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3336
+DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x32383630
+
+DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x002F0038
+DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
+DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001F001F
+DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
+
+DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000000
+DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000000
+
+DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D
+DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
+DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000
diff -Nur u-boot-2015.01.orig/board/udoo/ddr-setup_dl.cfg u-boot-2015.01/board/udoo/ddr-setup_dl.cfg
--- u-boot-2015.01.orig/board/udoo/ddr-setup_dl.cfg 1969-12-31 21:00:00.000000000 -0300
+++ u-boot-2015.01/board/udoo/ddr-setup_dl.cfg 2016-02-24 01:42:53.330380669 -0300
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2013 Seco USA Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type Address Value
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address absolute address of the register
+ * value value to be stored in the register
+ */
+
+/*
+ * DDR3 settings
+ * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock),
+ * memory bus width: 64 bits x16/x32/x64
+ * MX6DL ddr is limited to 800 MHz(400 MHz clock)
+ * memory bus width: 64 bits x16/x32/x64
+ * MX6SOLO ddr is limited to 800 MHz(400 MHz clock)
+ * memory bus width: 32 bits x16/x32
+ */
+DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000028
+
+DATA 4, MX6_IOM_GRP_B0DS, 0x00000028
+DATA 4, MX6_IOM_GRP_B1DS, 0x00000028
+DATA 4, MX6_IOM_GRP_B2DS, 0x00000028
+DATA 4, MX6_IOM_GRP_B3DS, 0x00000028
+DATA 4, MX6_IOM_GRP_B4DS, 0x00000028
+DATA 4, MX6_IOM_GRP_B5DS, 0x00000028
+DATA 4, MX6_IOM_GRP_B6DS, 0x00000028
+DATA 4, MX6_IOM_GRP_B7DS, 0x00000028
+DATA 4, MX6_IOM_GRP_ADDDS, 0x00000028
+
+DATA 4, MX6_IOM_GRP_CTLDS, 0x00000028
+
+DATA 4, MX6_IOM_DRAM_DQM0, 0x00000028
+DATA 4, MX6_IOM_DRAM_DQM1, 0x00000028
+DATA 4, MX6_IOM_DRAM_DQM2, 0x00000028
+DATA 4, MX6_IOM_DRAM_DQM3, 0x00000028
+DATA 4, MX6_IOM_DRAM_DQM4, 0x00000028
+DATA 4, MX6_IOM_DRAM_DQM5, 0x00000028
+DATA 4, MX6_IOM_DRAM_DQM6, 0x00000028
+DATA 4, MX6_IOM_DRAM_DQM7, 0x00000028
+
+DATA 4, MX6_IOM_DRAM_CAS, 0x00000028
+DATA 4, MX6_IOM_DRAM_RAS, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00000028
+
+DATA 4, MX6_IOM_DRAM_RESET, 0x00000028
+
+DATA 4, MX6_IOM_DRAM_SDODT0, 0x00000028
+DATA 4, MX6_IOM_DRAM_SDODT1, 0x00000028
+
+/* (differential input) */
+DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000
+/* (differential input) */
+DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000
+/* disable ddr pullups */
+DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000
+DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
+/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */
+DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000
+
+/* Read data DQ Byte0-3 delay */
+DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
+DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
+DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
+DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
+DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
+DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
+DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
+DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
diff -Nur u-boot-2015.01.orig/board/udoo/udoo-dl.cfg u-boot-2015.01/board/udoo/udoo-dl.cfg
--- u-boot-2015.01.orig/board/udoo/udoo-dl.cfg 1969-12-31 21:00:00.000000000 -0300
+++ u-boot-2015.01/board/udoo/udoo-dl.cfg 2016-02-24 01:42:53.330380669 -0300
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2013 Boundary Devices
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Refer doc/README.imximage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM sd
+
+#define __ASSEMBLY__
+#include <config.h>
+#include "asm/arch/mx6-ddr.h"
+#include "asm/arch/iomux.h"
+#include "asm/arch/crm_regs.h"
+
+#include "ddr-setup_dl.cfg"
+#include "1066mhz_4x256mx16_dl.cfg"
+#include "clocks.cfg"
diff -Nur u-boot-2015.01.orig/configs/udoo_dl_defconfig u-boot-2015.01/configs/udoo_dl_defconfig
--- u-boot-2015.01.orig/configs/udoo_dl_defconfig 1969-12-31 21:00:00.000000000 -0300
+++ u-boot-2015.01/configs/udoo_dl_defconfig 2016-02-24 01:42:53.330380669 -0300
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/udoo/udoo-dl.cfg,MX6DL,DDR_MB=1024"
+CONFIG_ARM=y
+CONFIG_TARGET_UDOO=y
diff -Nur u-boot-2015.01.orig/include/configs/udoo.h u-boot-2015.01/include/configs/udoo.h
--- u-boot-2015.01.orig/include/configs/udoo.h 2015-01-12 12:39:08.000000000 -0200
+++ u-boot-2015.01/include/configs/udoo.h 2016-02-24 01:47:09.384245992 -0300
@@ -96,11 +96,26 @@
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FS_GENERIC
#define CONFIG_DOS_PARTITION
+#define CONFIG_IDENT_STRING " Parabola GNU/Linux-libre ARM"
+
+#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
+#define CONFIG_DEFAULT_FDT_FILE "imx6dl-udoo.dtb"
+#elif defined(CONFIG_MX6Q)
#define CONFIG_DEFAULT_FDT_FILE "imx6q-udoo.dtb"
+#endif
+
+/* Enable extlinux boot support */
+#define CONFIG_CMD_PXE
+#define CONFIG_MENU
+#define BOOT_TARGET_DEVICES(func)
+#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
+ BOOTENV \
"script=boot.scr\0" \
"image=zImage\0" \
"console=ttymxc1\0" \
@@ -111,9 +126,11 @@
"fdt_addr=0x18000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
+ "devtype=mmc\0" \
+ "devnum=0\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
- "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
+ "mmcroot=/dev/mmcblk0p1 rw rootwait\0" \
"update_sd_firmware_filename=u-boot.imx\0" \
"update_sd_firmware=" \
"if test ${ip_dyn} = yes; then " \
@@ -178,6 +195,7 @@
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
+ "run scan_dev_for_boot;" \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
|
