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author | David P <megver83@parabola.nu> | 2020-01-21 13:13:40 -0300 |
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committer | David P <megver83@parabola.nu> | 2020-01-21 13:13:40 -0300 |
commit | 5152941afaaaab20b026fc8f12605d8c468fd707 (patch) | |
tree | 2033ef39ca615533298c9f9e7d2ca3a6bdeaa937 /libre/linux-libre-pae/0010-drm-i915-Limit-audio-CDCLK-2-BCLK-constraint-back-to.patch | |
parent | dcb2d06dc4eba114130d461f67948a61ae148205 (diff) | |
download | abslibre-5152941afaaaab20b026fc8f12605d8c468fd707.tar.gz abslibre-5152941afaaaab20b026fc8f12605d8c468fd707.tar.bz2 abslibre-5152941afaaaab20b026fc8f12605d8c468fd707.zip |
updpkg: libre/linux-libre-pae 5.4.13-1
Signed-off-by: David P <megver83@parabola.nu>
Diffstat (limited to 'libre/linux-libre-pae/0010-drm-i915-Limit-audio-CDCLK-2-BCLK-constraint-back-to.patch')
-rw-r--r-- | libre/linux-libre-pae/0010-drm-i915-Limit-audio-CDCLK-2-BCLK-constraint-back-to.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/libre/linux-libre-pae/0010-drm-i915-Limit-audio-CDCLK-2-BCLK-constraint-back-to.patch b/libre/linux-libre-pae/0010-drm-i915-Limit-audio-CDCLK-2-BCLK-constraint-back-to.patch new file mode 100644 index 000000000..f1735399a --- /dev/null +++ b/libre/linux-libre-pae/0010-drm-i915-Limit-audio-CDCLK-2-BCLK-constraint-back-to.patch @@ -0,0 +1,64 @@ +From ce769a8e35537fc71cc9934a1fa39a481f994b25 Mon Sep 17 00:00:00 2001 +From: Kai Vehmanen <kai.vehmanen@linux.intel.com> +Date: Tue, 31 Dec 2019 16:00:07 +0200 +Subject: [PATCH 10/15] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to + GLK only + +Revert changes done in commit f6ec9483091f ("drm/i915: extend audio +CDCLK>=2*BCLK constraint to more platforms"). Audio drivers +communicate with i915 over HDA bus multiple times during system +boot-up and each of these transactions result in matching +get_power/put_power calls to i915, and depending on the platform, +a modeset change causing visible flicker. + +GLK is the only platform with minimum CDCLK significantly lower +than BCLK, and thus for GLK setting a higher CDCLK is mandatory. + +For other platforms, minimum CDCLK is close but below 2*BCLK +(e.g. on ICL, CDCLK=176.4kHz with BCLK=96kHz). Spec-wise the constraint +should be set, but in practise no communication errors have been +reported and the downside if set is the flicker observed at boot-time. + +Revert to old behaviour until better mechanism to manage +probe-time clocks is available. + +The full CDCLK>=2*BCLK constraint is still enforced at pipe +enable time in intel_crtc_compute_min_cdclk(). + +Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/913 +Fixes: f6ec9483091f ("drm/i915: extend audio CDCLK>=2*BCLK constraint to more platforms") +Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> +Reviewed-by: Matt Roper <matthew.d.roper@intel.com> +Signed-off-by: Matt Roper <matthew.d.roper@intel.com> +Link: https://patchwork.freedesktop.org/patch/msgid/20191231140007.31728-1-kai.vehmanen@linux.intel.com +(cherry picked from commit 1ee48a61aa57dbdbc3cd2808d8b28df40d938e44) +Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> +--- + drivers/gpu/drm/i915/display/intel_audio.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c +index 05ef43b13d1c..0cf475f3063c 100644 +--- a/drivers/gpu/drm/i915/display/intel_audio.c ++++ b/drivers/gpu/drm/i915/display/intel_audio.c +@@ -858,7 +858,7 @@ static unsigned long i915_audio_component_get_power(struct device *kdev) + } + + /* Force CDCLK to 2*BCLK as long as we need audio powered. */ +- if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) ++ if (IS_GEMINILAKE(dev_priv)) + glk_force_audio_cdclk(dev_priv, true); + + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) +@@ -877,7 +877,7 @@ static void i915_audio_component_put_power(struct device *kdev, + + /* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */ + if (--dev_priv->audio_power_refcount == 0) +- if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) ++ if (IS_GEMINILAKE(dev_priv)) + glk_force_audio_cdclk(dev_priv, false); + + intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO, cookie); +-- +2.25.0 + |