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author | Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org> | 2020-01-08 19:37:35 +0100 |
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committer | Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org> | 2020-01-08 19:47:50 +0100 |
commit | 3d00a8089ed6fd5875be75733adc2da3768ba252 (patch) | |
tree | 5ed74e627f761c0054ae4bbc71185c380f6806f6 /kernels/linux-libre-arm64/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch | |
parent | b8dd027e7c1b4103263135b75537d7117792ac8e (diff) | |
download | abslibre-3d00a8089ed6fd5875be75733adc2da3768ba252.tar.gz abslibre-3d00a8089ed6fd5875be75733adc2da3768ba252.tar.bz2 abslibre-3d00a8089ed6fd5875be75733adc2da3768ba252.zip |
kernels: add linux-libre-aarch64
Some System On a Chip (SOC) have 64bit ARM CPUs that are also
capable of running arm 32bit applications.
Since:
- Parabola doesn't have an aarch64 package repository yet
- The devicetree of devices using such System On a Chip
are not compiled when using the armv7 defconfig
- Drivers or other platform support code for such hardware
might also not be compiled in with the armv7 defconfig
- This approach has already been tested with the linux-libre-x86_64
kenrel
It's then a good idea to add support for such devices by adding
an arrch64 kernel as the maintenance and work is minimal.
The downside is that the external kernel modules that are either
compiled against the kernel or using DKMS will not work by default.
It's however still possible to compile them by hand by using
ARCH= and CROSS_COMPILE= as it is done for this kernel, so it
should be relatively easy to add support for the non-dkms modules.
As for DKMS, someone would need to look into it to understand how
to pass it the make flags (ARCH= and CROSS_COMPILE=) that are
required to automatically build modules.
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Diffstat (limited to 'kernels/linux-libre-arm64/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch')
-rw-r--r-- | kernels/linux-libre-arm64/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/kernels/linux-libre-arm64/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch b/kernels/linux-libre-arm64/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch new file mode 100644 index 000000000..24a7c3d84 --- /dev/null +++ b/kernels/linux-libre-arm64/0004-PCI-pciehp-Do-not-disable-interrupt-twice-on-suspend.patch @@ -0,0 +1,99 @@ +From 0407fd310903c18882a7e0463930a71a46b61027 Mon Sep 17 00:00:00 2001 +From: Mika Westerberg <mika.westerberg@linux.intel.com> +Date: Tue, 29 Oct 2019 20:00:21 +0300 +Subject: [PATCH 04/13] PCI: pciehp: Do not disable interrupt twice on suspend + +We try to keep PCIe hotplug ports runtime suspended when entering system +suspend. Because the PCIe portdrv sets the DPM_FLAG_NEVER_SKIP flag, the PM +core always calls system suspend/resume hooks even if the device is left +runtime suspended. Since PCIe hotplug driver re-used the same function for +both runtime suspend and system suspend, it ended up disabling hotplug +interrupt twice and the second time following was printed: + + pciehp 0000:03:01.0:pcie204: pcie_do_write_cmd: no response from device + +Prevent this from happening by checking whether the device is already +runtime suspended when the system suspend hook is called. + +Fixes: 9c62f0bfb832 ("PCI: pciehp: Implement runtime PM callbacks") +Link: https://lore.kernel.org/r/20191029170022.57528-1-mika.westerberg@linux.intel.com +Reported-by: Kai-Heng Feng <kai.heng.feng@canonical.com> +Tested-by: Kai-Heng Feng <kai.heng.feng@canonical.com> +Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> +Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> +Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> +--- + drivers/pci/hotplug/pciehp_core.c | 25 +++++++++++++++++++++++-- + 1 file changed, 23 insertions(+), 2 deletions(-) + +diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c +index b3122c151b80..56daad828c9e 100644 +--- a/drivers/pci/hotplug/pciehp_core.c ++++ b/drivers/pci/hotplug/pciehp_core.c +@@ -253,7 +253,7 @@ static bool pme_is_native(struct pcie_device *dev) + return pcie_ports_native || host->native_pme; + } + +-static int pciehp_suspend(struct pcie_device *dev) ++static void pciehp_disable_interrupt(struct pcie_device *dev) + { + /* + * Disable hotplug interrupt so that it does not trigger +@@ -261,7 +261,19 @@ static int pciehp_suspend(struct pcie_device *dev) + */ + if (pme_is_native(dev)) + pcie_disable_interrupt(get_service_data(dev)); ++} + ++#ifdef CONFIG_PM_SLEEP ++static int pciehp_suspend(struct pcie_device *dev) ++{ ++ /* ++ * If the port is already runtime suspended we can keep it that ++ * way. ++ */ ++ if (dev_pm_smart_suspend_and_suspended(&dev->port->dev)) ++ return 0; ++ ++ pciehp_disable_interrupt(dev); + return 0; + } + +@@ -279,6 +291,7 @@ static int pciehp_resume_noirq(struct pcie_device *dev) + + return 0; + } ++#endif + + static int pciehp_resume(struct pcie_device *dev) + { +@@ -292,6 +305,12 @@ static int pciehp_resume(struct pcie_device *dev) + return 0; + } + ++static int pciehp_runtime_suspend(struct pcie_device *dev) ++{ ++ pciehp_disable_interrupt(dev); ++ return 0; ++} ++ + static int pciehp_runtime_resume(struct pcie_device *dev) + { + struct controller *ctrl = get_service_data(dev); +@@ -318,10 +337,12 @@ static struct pcie_port_service_driver hpdriver_portdrv = { + .remove = pciehp_remove, + + #ifdef CONFIG_PM ++#ifdef CONFIG_PM_SLEEP + .suspend = pciehp_suspend, + .resume_noirq = pciehp_resume_noirq, + .resume = pciehp_resume, +- .runtime_suspend = pciehp_suspend, ++#endif ++ .runtime_suspend = pciehp_runtime_suspend, + .runtime_resume = pciehp_runtime_resume, + #endif /* PM */ + }; +-- +2.24.1 + |