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-rw-r--r--libre-testing/linux-libre/0008-USB-armory-support.patch329
1 files changed, 329 insertions, 0 deletions
diff --git a/libre-testing/linux-libre/0008-USB-armory-support.patch b/libre-testing/linux-libre/0008-USB-armory-support.patch
new file mode 100644
index 000000000..13b415604
--- /dev/null
+++ b/libre-testing/linux-libre/0008-USB-armory-support.patch
@@ -0,0 +1,329 @@
+From ac49b5026524acf13cbdeef8d5f72257aef3e31d Mon Sep 17 00:00:00 2001
+From: Kevin Mihelich <kevin@archlinuxarm.org>
+Date: Sat, 7 Mar 2015 16:51:15 -0700
+Subject: [PATCH 8/8] USB armory support
+
+---
+ arch/arm/boot/dts/Makefile | 3 +
+ arch/arm/boot/dts/imx53-usbarmory-common.dtsi | 209 ++++++++++++++++++++++++++
+ arch/arm/boot/dts/imx53-usbarmory-gpio.dts | 26 ++++
+ arch/arm/boot/dts/imx53-usbarmory-host.dts | 18 +++
+ arch/arm/boot/dts/imx53-usbarmory.dts | 18 +++
+ 5 files changed, 274 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx53-usbarmory-common.dtsi
+ create mode 100644 arch/arm/boot/dts/imx53-usbarmory-gpio.dts
+ create mode 100644 arch/arm/boot/dts/imx53-usbarmory-host.dts
+ create mode 100644 arch/arm/boot/dts/imx53-usbarmory.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 5586e7a..d54f5f7 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -264,6 +264,9 @@ dtb-$(CONFIG_SOC_IMX53) += \
+ imx53-smd.dtb \
+ imx53-tx53-x03x.dtb \
+ imx53-tx53-x13x.dtb \
++ imx53-usbarmory.dtb \
++ imx53-usbarmory-gpio.dtb \
++ imx53-usbarmory-host.dtb \
+ imx53-voipac-bsb.dtb
+ dtb-$(CONFIG_SOC_IMX6Q) += \
+ imx6dl-apf6dev.dtb \
+diff --git a/arch/arm/boot/dts/imx53-usbarmory-common.dtsi b/arch/arm/boot/dts/imx53-usbarmory-common.dtsi
+new file mode 100644
+index 0000000..c7cbd84
+--- /dev/null
++++ b/arch/arm/boot/dts/imx53-usbarmory-common.dtsi
+@@ -0,0 +1,209 @@
++/*
++ * USB armory MkI device tree include file
++ * http://inversepath.com/usbarmory
++ *
++ * Copyright (C) 2015, Inverse Path
++ * Andrej Rosano <andrej@inversepath.com>
++ *
++ * Licensed under GPLv2
++ */
++
++#include "imx53.dtsi"
++
++/ {
++ model = "Inverse Path USB armory";
++ compatible = "inversepath,imx53-usbarmory", "fsl,imx53";
++};
++
++/ {
++ chosen {
++ stdout-path = &uart1;
++ };
++
++ memory {
++ reg = <0x70000000 0x20000000>;
++ };
++
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&led_pin_gpio4_27>;
++
++ user {
++ label = "LED";
++ gpios = <&gpio4 27 0>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ soc {
++ aips@60000000 {
++ sahara: crypto@63ff8000 {
++ compatible = "fsl,imx53-sahara";
++ reg = <0x63ff8000 0x4000>;
++ interrupts = <19 20>;
++ clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>,
++ <&clks IMX5_CLK_SAHARA_IPG_GATE>;
++ clock-names = "ipg", "ahb";
++ };
++ };
++ };
++};
++
++&cpu0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a8";
++ reg = <0x0>;
++ clocks = <&clks IMX5_CLK_ARM>;
++ clock-latency = <61036>;
++ voltage-tolerance = <5>;
++ operating-points = <
++ /* kHz */
++ 166666 850000
++ 400000 900000
++ 800000 1050000
++ >;
++};
++
++&esdhc1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_esdhc1>;
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++
++ imx53-usbarmory {
++ pinctrl_pinheader: pinheadergrp {
++ fsl,pins = <
++ MX53_PAD_CSI0_DAT8__GPIO5_26 0xc0
++ MX53_PAD_CSI0_DAT9__GPIO5_27 0xc0
++ MX53_PAD_CSI0_DAT10__GPIO5_28 0xc0
++ MX53_PAD_CSI0_DAT11__GPIO5_29 0xc0
++ MX53_PAD_CSI0_DAT12__GPIO5_30 0xc0
++ >;
++ };
++
++ led_pin_gpio4_27: led_gpio4_27@0 {
++ fsl,pins = <
++ MX53_PAD_DISP0_DAT6__GPIO4_27 0x80000000
++ >;
++ };
++
++ pinctrl_esdhc1: esdhc1grp {
++ fsl,pins = <
++ MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
++ MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
++ MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
++ MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
++ MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
++ MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
++ >;
++ };
++
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins = <
++ MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000
++ MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000
++ >;
++ };
++
++ pinctrl_uart1: uart1grp {
++ fsl,pins = <
++ MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
++ MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
++ >;
++ };
++ pinctrl_gpio5: gpio5grp {
++ fsl,pins = <
++ MX53_PAD_CSI0_DAT8__GPIO5_26 0xc0
++ MX53_PAD_CSI0_DAT9__GPIO5_27 0xc0
++ MX53_PAD_CSI0_DAT10__GPIO5_28 0xc0
++ MX53_PAD_CSI0_DAT11__GPIO5_29 0xc0
++ MX53_PAD_CSI0_DAT12__GPIO5_30 0xc0
++ >;
++ };
++ };
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart1>;
++ status = "okay";
++};
++
++&vpu {
++ status = "okay";
++};
++
++&i2c1 {
++ ltc3589: pmic@34 {
++ compatible = "lltc,ltc3589-2";
++ reg = <0x34>;
++
++ regulators {
++ sw1_reg: sw1 {
++ regulator-min-microvolt = <591930>;
++ regulator-max-microvolt = <1224671>;
++ lltc,fb-voltage-divider = <100000 158000>;
++ regulator-ramp-delay = <7000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw2_reg: sw2 {
++ regulator-min-microvolt = <704123>;
++ regulator-max-microvolt = <1456803>;
++ lltc,fb-voltage-divider = <180000 191000>;
++ regulator-ramp-delay = <7000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw3_reg: sw3 {
++ regulator-min-microvolt = <1341250>;
++ regulator-max-microvolt = <2775000>;
++ lltc,fb-voltage-divider = <270000 100000>;
++ regulator-ramp-delay = <7000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ bb_out_reg: bb-out {
++ regulator-min-microvolt = <3387341>;
++ regulator-max-microvolt = <3387341>;
++ lltc,fb-voltage-divider = <511000 158000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++ ldo1_reg: ldo1 {
++ regulator-min-microvolt = <1306329>;
++ regulator-max-microvolt = <1306329>;
++ lltc,fb-voltage-divider = <100000 158000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ ldo2_reg: ldo2 {
++ regulator-min-microvolt = <704123>;
++ regulator-max-microvolt = <1456806>;
++ lltc,fb-voltage-divider = <180000 191000>;
++ regulator-ramp-delay = <7000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ ldo3_reg: ldo3 {
++ regulator-min-microvolt = <2800000>;
++ regulator-max-microvolt = <2800000>;
++ regulator-boot-on;
++ };
++
++ ldo4_reg: ldo4 {
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <3200000>;
++ };
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/imx53-usbarmory-gpio.dts b/arch/arm/boot/dts/imx53-usbarmory-gpio.dts
+new file mode 100644
+index 0000000..bf85ffa
+--- /dev/null
++++ b/arch/arm/boot/dts/imx53-usbarmory-gpio.dts
+@@ -0,0 +1,26 @@
++/*
++ * USB armory MkI device mode device tree file
++ * http://inversepath.com/usbarmory
++ *
++ * Copyright (C) 2015, Inverse Path
++ * Andrej Rosano <andrej@inversepath.com>
++ *
++ * Licensed under GPLv2
++ */
++
++/dts-v1/;
++
++#include "imx53-usbarmory-common.dtsi"
++
++&usbotg {
++ dr_mode = "peripheral";
++ status = "okay";
++};
++
++&iomuxc {
++ pinctrl-0 = <&pinctrl_pinheader>;
++};
++
++&uart1 {
++ status = "disabled";
++};
+diff --git a/arch/arm/boot/dts/imx53-usbarmory-host.dts b/arch/arm/boot/dts/imx53-usbarmory-host.dts
+new file mode 100644
+index 0000000..ea2ea45
+--- /dev/null
++++ b/arch/arm/boot/dts/imx53-usbarmory-host.dts
+@@ -0,0 +1,18 @@
++/*
++ * USB armory MkI host mode device tree file
++ * http://inversepath.com/usbarmory
++ *
++ * Copyright (C) 2015, Inverse Path
++ * Andrej Rosano <andrej@inversepath.com>
++ *
++ * Licensed under GPLv2
++ */
++
++/dts-v1/;
++
++#include "imx53-usbarmory-common.dtsi"
++
++&usbotg {
++ dr_mode = "host";
++ status = "okay";
++};
+diff --git a/arch/arm/boot/dts/imx53-usbarmory.dts b/arch/arm/boot/dts/imx53-usbarmory.dts
+new file mode 100644
+index 0000000..902a73b
+--- /dev/null
++++ b/arch/arm/boot/dts/imx53-usbarmory.dts
+@@ -0,0 +1,18 @@
++/*
++ * USB armory MkI device mode device tree file
++ * http://inversepath.com/usbarmory
++ *
++ * Copyright (C) 2015, Inverse Path
++ * Andrej Rosano <andrej@inversepath.com>
++ *
++ * Licensed under GPLv2
++ */
++
++/dts-v1/;
++
++#include "imx53-usbarmory-common.dtsi"
++
++&usbotg {
++ dr_mode = "peripheral";
++ status = "okay";
++};
+--
+2.4.5
+