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author | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-04-12 04:50:51 -0300 |
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committer | André Fabian Silva Delgado <emulatorman@parabola.nu> | 2016-04-12 04:50:51 -0300 |
commit | 7e64ab6289f872211b2ed774a0011379edafd966 (patch) | |
tree | d4864f06c21f96a0d06447ca972d7c7f032aa131 /kernels/linux-libre-lts-knock/0002-ARM-sun5i-add-CHIP-DTS.patch | |
parent | 48edda5793a44d5578f2ae26a02594ed035d3e02 (diff) | |
download | abslibre-7e64ab6289f872211b2ed774a0011379edafd966.tar.gz abslibre-7e64ab6289f872211b2ed774a0011379edafd966.tar.bz2 abslibre-7e64ab6289f872211b2ed774a0011379edafd966.zip |
linux-libre-lts-knock: add more patches for the C.H.I.P single-board computer support
Diffstat (limited to 'kernels/linux-libre-lts-knock/0002-ARM-sun5i-add-CHIP-DTS.patch')
-rw-r--r-- | kernels/linux-libre-lts-knock/0002-ARM-sun5i-add-CHIP-DTS.patch | 256 |
1 files changed, 256 insertions, 0 deletions
diff --git a/kernels/linux-libre-lts-knock/0002-ARM-sun5i-add-CHIP-DTS.patch b/kernels/linux-libre-lts-knock/0002-ARM-sun5i-add-CHIP-DTS.patch new file mode 100644 index 000000000..2ca192730 --- /dev/null +++ b/kernels/linux-libre-lts-knock/0002-ARM-sun5i-add-CHIP-DTS.patch @@ -0,0 +1,256 @@ +From 465a225fb2afb3ebf1becbe76d46b084d46f30a5 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard <maxime.ripard@free-electrons.com> +Date: Tue, 9 Jun 2015 19:38:43 +0200 +Subject: [PATCH 2/3] ARM: sun5i: Add C.H.I.P DTS + +The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of +RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack +and two connectors to plug additional boards on top of it. + +Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> +Reviewed-by: Hans de Goede <hdegoede@redhat.com> +Acked-by: Chen-Yu Tsai <wens@csie.org> +Reviewed-by: André Silva <emulatorman@parabola.nu> +--- + arch/arm/boot/dts/Makefile | 3 +- + arch/arm/boot/dts/sun5i-r8-chip.dts | 214 ++++++++++++++++++++++++++++++++++++ + 2 files changed, 216 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/boot/dts/sun5i-r8-chip.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 992736b..f8d18bd 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -540,7 +540,8 @@ dtb-$(CONFIG_MACH_SUN5I) += \ + sun5i-a10s-r7-tv-dongle.dtb \ + sun5i-a13-hsg-h702.dtb \ + sun5i-a13-olinuxino.dtb \ +- sun5i-a13-olinuxino-micro.dtb ++ sun5i-a13-olinuxino-micro.dtb \ ++ sun5i-r8-chip.dtb + dtb-$(CONFIG_MACH_SUN6I) += \ + sun6i-a31-app4-evb1.dtb \ + sun6i-a31-colombus.dtb \ +diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts +new file mode 100644 +index 0000000..abf3ccb +--- /dev/null ++++ b/arch/arm/boot/dts/sun5i-r8-chip.dts +@@ -0,0 +1,214 @@ ++/* ++ * Copyright 2015 Free Electrons ++ * Copyright 2015 NextThing Co ++ * ++ * Maxime Ripard <maxime.ripard@free-electrons.com> ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun5i-r8.dtsi" ++#include "sunxi-common-regulators.dtsi" ++ ++#include <dt-bindings/gpio/gpio.h> ++#include <dt-bindings/interrupt-controller/irq.h> ++ ++/ { ++ model = "NextThing C.H.I.P."; ++ compatible = "nextthing,chip", "allwinner,sun5i-r8"; ++ ++ aliases { ++ i2c0 = &i2c0; ++ i2c2 = &i2c2; ++ serial0 = &uart1; ++ serial1 = &uart3; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins_a>; ++ status = "okay"; ++ ++ axp209: pmic@34 { ++ reg = <0x34>; ++ ++ /* ++ * The interrupt is routed through the "External Fast ++ * Interrupt Request" pin (ball G13 of the module) ++ * directly to the main interrupt controller, without ++ * any other controller interfering. ++ */ ++ interrupts = <0>; ++ }; ++}; ++ ++#include "axp209.dtsi" ++ ++&i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins_a>; ++ status = "okay"; ++ ++ xio: gpio@38 { ++ compatible = "nxp,pcf8574a"; ++ reg = <0x38>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ interrupt-parent = <&pio>; ++ interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&otg_sram { ++ status = "okay"; ++}; ++ ++&pio { ++ chip_vbus_pin: chip_vbus_pin@0 { ++ allwinner,pins = "PB10"; ++ allwinner,function = "gpio_out"; ++ allwinner,drive = <SUN4I_PINCTRL_10_MA>; ++ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; ++ }; ++ ++ chip_id_det_pin: chip_id_det_pin@0 { ++ allwinner,pins = "PG2"; ++ allwinner,function = "gpio_in"; ++ allwinner,drive = <SUN4I_PINCTRL_10_MA>; ++ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; ++ }; ++}; ++ ++®_dcdc2 { ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-name = "cpuvdd"; ++ regulator-always-on; ++}; ++ ++®_dcdc3 { ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-name = "corevdd"; ++ regulator-always-on; ++}; ++ ++®_ldo1 { ++ regulator-name = "rtcvdd"; ++}; ++ ++®_ldo2 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "avcc"; ++ regulator-always-on; ++}; ++ ++®_ldo5 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-1v8"; ++}; ++ ++®_usb0_vbus { ++ pinctrl-0 = <&chip_vbus_pin>; ++ vin-supply = <®_vcc5v0>; ++ gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */ ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins_b>; ++ status = "okay"; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins_a>, ++ <&uart3_pins_cts_rts_a>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usb_power_supply { ++ status = "okay"; ++}; ++ ++&usbphy { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&chip_id_det_pin>; ++ status = "okay"; ++ ++ usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ ++ usb0_vbus_power-supply = <&usb_power_supply>; ++ usb0_vbus-supply = <®_usb0_vbus>; ++ usb1_vbus-supply = <®_vcc5v0>; ++}; +-- +cgit v0.12 + |